#include "base_datatype_def.txt"

#include "extern_datatype_def.txt"

typedef unsigned long osal_u32;
typedef long osal_s32;
typedef unsigned long long osal_u64;
typedef long long osal_s64;
typedef unsigned short osal_u16;
typedef signed short osal_s16;
typedef unsigned char osal_u8;
typedef signed char osal_s8;
typedef void osal_void;
typedef char osal_char;
typedef unsigned char osal_uchar;
typedef osal_u8 osal_bool;
typedef void* osal_pvoid;
typedef osal_u8 osal_byte;
typedef osal_pvoid osal_handle;
typedef osal_byte* osal_pbyte;
typedef float osal_float;
typedef double osal_double;
typedef volatile osal_u32 osal_u32_reg;
typedef unsigned int osal_size_t;
typedef int osal_ssize_t;
typedef int osal_offset_t;
typedef int intptr_t;
typedef unsigned int uintptr_t;

typedef struct {
    osal_u8 wake_up_clk_correction;
    osal_bool deep_sleep_enable;
    osal_u16 osc_wakeup_time;
    osal_u16 min_sleep_duration;
    osal_u16 max_sleep_duration;
} bt_deep_sleep_kv_config;

typedef osal_u8 bt_addr_buffer_t[6];


typedef osal_u16 osal_length;
typedef osal_u8 osal_plmn_id[3];







typedef struct plmn_wact_t_ {
    osal_u8 plmn_id[3];
    osal_u8 acc_tech[2];
} plmn_wact_t;
typedef struct usim_imsi_t_ {
    osal_length len;
    osal_u8 imsi[8];
} usim_imsi_t;





typedef struct usim_eps_loci_t_ {
    osal_u8 guti[12];
    osal_u8 tai[5];
    osal_u8 update_status;
} usim_eps_loci_t;
typedef struct e_equiv_plmn_list_t_ {
    osal_length list_count;
    osal_plmn_id list[16];
} e_equiv_plmn_list_t;

typedef struct imsi_s_ {
    osal_length len;
    osal_u8 imsi[8];
} imsi_s;




typedef struct emm_dcn_list_entry_s_ {
    osal_plmn_id dcn_plmn;
    osal_u16 dcn_id;
} emm_dcn_list_entry_s;

typedef struct emm_dcn_list_s_ {
    osal_u8 num_dcn_entries;
    emm_dcn_list_entry_s dcn_ids[32];
} emm_dcn_list_s;




typedef osal_u32 sf_count;


typedef osal_s16 centibels;






typedef osal_u16 raster_offsets;


typedef struct {
    osal_u32 slow_search_period;

    osal_u32 fast_search_period;

    osal_u16 cfo_tolerance;
    raster_offsets cfo_offsets;

} ll1_npss_params;

typedef struct {
    sf_count resync_gap;


    osal_u16 resync_max_timing_err;


    osal_u16 periodic_resync_max_timing_err;


    osal_u8 resync_avg_window_normal_coverage;


    osal_u8 resync_avg_window_deep_coverage;


    osal_u32 slow_search_period;

    osal_u32 fast_search_period;

    osal_u8 pad[2];
} ll1_nsss_params;

typedef struct {
    osal_u32 fast_search_period;

    osal_u32 midd_search_period;

    osal_u32 slow_search_period;

} ll1_npbch_params;

typedef struct {
    osal_u8 max_rep_si_comb;

    osal_u8 max_rep_sib1_comb;

} ll1_sofcomb_params;

typedef struct {
    osal_u16 sss_resync_max_timing_err;

    osal_u8 rtc_clock_err;



    osal_u8 pad;
} ll1_lpm_params;

typedef struct {
    osal_bool enable_fast_scan;
    osal_bool early_exit_slow_scan;
} ll1_channel_scan_params;


typedef struct {
    osal_u32 fast_search_period;

    osal_u32 deep_search_period;


} ll1_freq_quality_scan_params;

typedef struct {
    osal_u8 ncell_invisible_threshold;

} ll1_ncell_params;

typedef struct {
    osal_u16 npdcch_rep_ecl_0;


    osal_u16 npdcch_rep_ecl_1;


    osal_u16 npdcch_rep_ecl_2;


} ll1_paging_params;

typedef struct {
    sf_count max_nprs_duration_sf;


    osal_u8 max_otdoa_ncells;



    osal_u8 max_num_nprs_sf_needed;



} ll1_otdoa_params;

typedef struct {
    osal_s16 ecl_snr_minimum[2];

} ll1_ecl_snr_threshold;

typedef struct {
    osal_u8 max_npdsch_rep;


    osal_u8 max_k0_anchor;


    osal_u8 max_k0_non_anchor;


} ll1_npdsch_sensitivity_opt_params;

typedef struct {
    osal_s16 frequency_error_magnitude_limit_ppbi;

    osal_u8 frequency_error_adjustment_factor;
} ll1_freq_error_magnitude;

typedef struct {
    osal_u16 band_id;
    osal_u16 if_low_ch_khz;
    osal_u16 if_mid_ch_khz;
    osal_u16 if_high_ch_khz;
} if_freq_for_channel;

typedef struct {
    osal_u16 num_configured_bands;
    if_freq_for_channel band_config[24];
} ll1_intermediate_freq_params;


typedef enum U8 {
    E_DRX_CYCLE_PARAM_2 = 2,
    E_DRX_CYCLE_PARAM_3 = 3,
    E_DRX_CYCLE_PARAM_5 = 5,
    E_DRX_CYCLE_PARAM_9 = 9,
    E_DRX_CYCLE_PARAM_10 = 10,
    E_DRX_CYCLE_PARAM_11 = 11,
    E_DRX_CYCLE_PARAM_12 = 12,
    E_DRX_CYCLE_PARAM_13 = 13,
    E_DRX_CYCLE_PARAM_14 = 14,
    E_DRX_CYCLE_PARAM_15 = 15,
    NUM_E_DRX_CYCLE_PARAM = 16
} eDRX_CYCLE_PARAM_e;


typedef enum U8 {
    E_PTW_VAL_0 = 0,
    E_PTW_VAL_1 = 1,
    E_PTW_VAL_2 = 2,
    E_PTW_VAL_3 = 3,
    E_PTW_VAL_4 = 4,
    E_PTW_VAL_5 = 5,
    E_PTW_VAL_6 = 6,
    E_PTW_VAL_7 = 7,
    E_PTW_VAL_8 = 8,
    E_PTW_VAL_9 = 9,
    E_PTW_VAL_10 = 10,
    E_PTW_VAL_11 = 11,
    E_PTW_VAL_12 = 12,
    E_PTW_VAL_13 = 13,
    E_PTW_VAL_14 = 14,
    E_PTW_VAL_15 = 15
} PAGING_TIME_WINDOW_LEN_e;


typedef enum U8 {
    INVALID_PDN = 0x0,
    IPV4 = 0x1,
    IPV6 = 0x2,
    IPV4V6 = 0x3,

    NON_IP = 0x5
} nas_pdn_type;


typedef struct {
    osal_u8 iccid[10];
} usim_ef_iccid;



typedef struct {
    osal_u8 last_used_tp_mr;
    osal_u8 tp_serv_cent_addr[12];
} usim_oc_sms_ef;
typedef enum U8 {
    NBIOT_INTG_ALG_EIA0_NULL = 0,
    NBIOT_INTG_ALG_128_EIA1 = 1,
    NBIOT_INTG_ALG_128_EIA2 = 2,
    NBIOT_INTG_ALG_EIA3 = 3,





    NBIOT_NUM_INTG_ALG
} nbiot_int_alg_t;

typedef enum U8 {
    NBIOT_CIPH_ALG_EEA0_NULL = 0,
    NBIOT_CIPH_ALG_128_EEA1 = 1,
    NBIOT_CIPH_ALG_128_EEA2 = 2,
    NBIOT_CIPH_ALG_EEA3 = 3,





    NBIOT_NUM_CIPH_ALG
} nbiot_ciph_alg_t;



;







typedef struct {
    osal_bool enable_ext_sim;
    osal_bool enable_eia0;
    osal_bool enable_eea0;
    osal_bool enable_eia1;
    osal_bool enable_eea1;
    osal_bool enable_eia2;
    osal_bool enable_eea2;
    osal_bool enable_eia3;
    osal_bool enable_eea3;
} nas_kv_sim_config_t;




typedef struct {
    osal_bool emm_reg_w_o_pdn;
    nas_pdn_type pdn_type;
    osal_u8 apn_len;
    osal_u8 apn[101];
    osal_u8 auth_port;
    osal_u8 auth_username_len;
    osal_u8 auth_password_len;
    osal_u8 auth_username[61];
    osal_u8 auth_password[61];
    osal_u8 pad[2];
} nas_kv_context_config_t;




typedef usim_eps_loci_t nas_kv_usim_eps_loci_t;




typedef struct {
    osal_u8 e_ksi;
    osal_u8 k_asme[32];
    osal_u32 uplink_nas_count;
    osal_u32 dnlink_nas_count;
    nbiot_int_alg_t intg_algorithm;
    nbiot_ciph_alg_t ciph_algorithm;
} nas_kv_usim_eps_nsc_t;




typedef struct {
    osal_u8 len;
    osal_u8 data[8];
} nas_kv_usim_pincode_t;





typedef struct {
    osal_bool nslpi_configured;
    osal_bool nslpi_override_configured;
    osal_bool excpt_data_report_configured;
    osal_bool fast_first_hpplmn_configured;

    osal_bool min_periodic_search_time_available;
    osal_u8 min_periodic_search_time;
    osal_bool t3245_behaviour;
    osal_bool attach_with_imsi;
} nas_kv_nas_config_t;





typedef struct nas_ue_capability_config_t_ {
    osal_bool psm_supported;
    osal_u8 req_psm_active_timer;
    osal_bool ext_timer_support;
    osal_u8 req_ext_periodic_timer;
    osal_bool emm_reg_w_o_pdn_supported;
} nas_ue_capability_config_t;





typedef struct {
    usim_oc_sms_ef ocsim_sms_ef;
} nas_kv_ocsim_sms_ef_t;





typedef struct {
    osal_u32 backoff_timer_remainder;
    osal_bool backoff_for_low_priority;
    osal_u32 t3245_remainder;
    osal_u32 t3447_remainder;
} nas_kv_timer_remainders_t;





typedef struct eplmn_list_store_info_t_ {
    e_equiv_plmn_list_t eplmn_list;
} eplmn_list_store_info_t;




typedef struct {
    osal_bool e_drx_is_supported;
    PAGING_TIME_WINDOW_LEN_e paging_time_window;
    eDRX_CYCLE_PARAM_e edrx_cycle;
} nas_kv_edrx_ptw_config_t;




typedef struct {
    osal_bool has_synchronized;
    osal_u8 req_psm_active_timer;
    osal_u8 req_ext_periodic_timer;
    PAGING_TIME_WINDOW_LEN_e paging_time_window;
    eDRX_CYCLE_PARAM_e edrx_cycle;
} nas_kv_psm_edrx_default_value_t;





typedef struct {
    osal_u8 rpm_n1;
    osal_u8 rpm_t1;
    osal_u8 rpm_f1;
    osal_u8 rpm_f2;
    osal_u8 rpm_f3;
    osal_u8 rpm_f4;

    osal_u8 rpm_lr1;
    osal_u8 rpm_lr2;
    osal_u8 rpm_lr3;
} nas_kv_rpm_params_t;




typedef struct {
    osal_u8 rpm_c_br1;
    osal_u8 rpm_c_r1;
    osal_u8 rpm_c_pdn1;
    osal_u8 rpm_c_pdn2;
    osal_u8 rpm_c_pdn3;
    osal_u8 rpm_c_pdn4;
} nas_kv_rpm_counts_t;





typedef struct dcn_id_list_store_info_t_ {
    emm_dcn_list_s dcn_id_list;
    osal_bool default_dcn_id_present;
    osal_u16 default_dcn_id;
} dcn_id_list_store_info_t;




typedef struct {
    osal_bool dns_server_ipv4_addr_request;
    osal_bool dns_server_ipv6_addr_request;
} nas_pdp_context_dynamic_param_request_item_config_t;




typedef enum U8 {
    PCO_IE = 1,
    EXT_PCO_IE = 2
} nas_kv_pco_ie_type_t;




typedef struct {
    usim_imsi_t imsi;
} nas_kv_usim_imsi_t;




typedef struct {
    osal_u8 list_count;
    osal_plmn_id list[4];
} nas_kv_usim_fplmn_t;






typedef enum U8 {
    NB_IOT_UE_POWER_CLASS_3 = 3,
    NB_IOT_UE_POWER_CLASS_5 = 5,
    NB_IOT_UE_POWER_CLASS_6 = 6,
    NB_IOT_UE_POWER_CLASS_INVALID = 0xFF
} nb_iot_ue_power_class;


typedef struct {
    osal_u8 band;
    nb_iot_ue_power_class power_class;
} nb_iot_ue_band_map_entry;



typedef struct {
    osal_u8 num_supported_bands;
    osal_u8 band_ids[20];
} nb_iot_ue_kv_supported_bands;

typedef struct {

    osal_u16 first_full_search_interval;

    osal_u16 full_search_interval_mult;
    osal_u16 max_full_search_interval;

    osal_u16 num_full_fast_searches;

    osal_u16 first_stored_search_interval;

    osal_u16 stored_search_interval_mult;
    osal_u16 max_stored_search_interval;



    osal_u16 band_scan_puncture_rate;


    osal_s32 fast_search_threshold;

    osal_s32 slow_search_threshold;

} nb_iot_ue_nvconfig_plmn_search_config_t;



typedef struct {
    osal_u8 num;
    nb_iot_ue_band_map_entry band_map_entry[20];
} band_map_power_class;




typedef struct {
    osal_bool autostart_enabled;
    osal_plmn_id default_plmn;

} nb_iot_ue_nvconfig_autostart_config_t;




typedef enum U8 {
    NB_IOT_CAT_NB1 = 1,
    NB_IOT_CAT_NB2 = 2
} nb_iot_nb_category_t;




typedef enum U8 {
    NB_IOT_UE_REL_13 = 13,
    NB_IOT_UE_REL_14 = 14,
    NB_IOT_UE_REL_15 = 15
} nb_iot_ue_rel_version;






typedef struct {
    osal_bool cplane_edt_enabled;
    osal_bool uplane_edt_enabled;
} nb_iot_ue_kv_edt_config_t;






typedef struct {
    osal_bool enabled;
    osal_u16 min_gap_edrx;
} nb_iot_ue_kv_wake_up_signal_config_t;






typedef struct {
    osal_bool sr_sps_bsr_enabled;
    osal_bool sr_with_harq_ack_enabled;
    osal_bool sr_without_harq_ack_enabled;
} nb_iot_ue_kv_scheduling_request_config_t;





typedef struct {
    osal_u8 num_supported_bands;
    osal_u8 band_ids[14];

} nb_iot_ue_kv_supported_bands_v1x_t;



typedef struct {
    osal_u8 num_supported_bands;
    osal_u8 band_ids[16];

} nb_iot_ue_kv_supported_bands_v2x_t;




typedef struct {
    osal_bool user_plane_enabled;
    osal_bool user_plane_opt_enabled;
    osal_bool multiple_drb_enabled;
    osal_bool user_plane_preferred;

} nb_iot_ue_nvconfig_uplane_config_t;





typedef struct {
    osal_bool enable_reporting;

    osal_u8 timeout;
} nb_iot_ue_data_inactivity_config_t;





typedef struct {
    nb_iot_ue_rel_version release;
    nb_iot_nb_category_t category;
    nb_iot_ue_nvconfig_uplane_config_t uplane;
    osal_bool multi_tone_enabled;
    osal_bool multi_carrier_enabled;
    osal_bool two_harq_enabled;
    osal_bool multi_carrier_paging_enabled;
    osal_bool multi_carrier_nprach_enabled;
    osal_bool interference_randomisation_enabled;
    osal_bool mac_rai;
    osal_bool rohc_enabled;
} nb_iot_ue_nvconfig_last_reported_capabilities_t;





typedef struct {
    osal_s8 meas_threshold_sinr_db;
    osal_s8 meas_offset_sinr_db;
    osal_u8 max_sinr_enable_times;

    osal_u8 max_sinr_disable_times;

} nb_iot_sinr_meas_control_config_t;

typedef struct {
    osal_s8 default_s_search_delta_p;

} nb_iot_relaxed_monitoring_config_t;

typedef struct {
    osal_bool reselection_enabled;

    osal_u8 resel_min_coverage_level;

    osal_s8 srxlev_meas_disable_hyst_db;



    osal_bool relaxed_monitoring_enabled;

    nb_iot_relaxed_monitoring_config_t relaxed_monitoring_config;
    osal_bool sinr_meas_control_enabled;

    nb_iot_sinr_meas_control_config_t sinr_meas_control_config;

} nb_iot_cell_reselection_config_t;




typedef struct {
    osal_plmn_id plmn;
    osal_u8 num_bands;
    osal_u8 bands[2];
} nb_iot_hp_band_item_t;

typedef struct {
    osal_u8 num_items;
    nb_iot_hp_band_item_t item[3];
} nb_iot_hp_band_config_t;
typedef struct {
    osal_u8 pdu_count;
    osal_u16 pdu_bytes;
} nb_iot_l2_pdu_count_and_bytes_without_poll_t;


typedef osal_u32 nb_iot_earfcn;
typedef osal_u8 rrc_kv_plmn_id_t[3];


typedef struct {
    osal_u32 earfcn;
    osal_bool deep_coverage;
} rrc_kv_last_earfcn_used_t;

typedef struct {
    nb_iot_earfcn earfcn;
    osal_u16 pci;
    osal_bool deep_coverage;
} rrc_kv_cell_t;


typedef struct {
    osal_u8 num;
    rrc_kv_cell_t item[5];
} rrc_kv_camped_on_earfcns_t;





typedef enum U8 {
    RRC_EDRX_UEID_MTMSI_B0_FIRST_INSEQ,
    RRC_EDRX_UEID_MTMSI_B31_FIRST_INSEQ,
    RRC_EDRX_UEID_MTMSI_B31_OCTET1_MSB,
    RRC_EDRX_UEID_MTMSI_B0_OCTET1_MSB
} rrc_edrx_ueid_bo_t;






typedef enum U8 {
    RRC_EDRX_UEID_TYPE_IMSI,
    RRC_EDRX_UEID_TYPE_CRC32_ITU_T,
    RRC_EDRX_UEID_TYPE_CRC32_POLY_LSB,
    RRC_EDRX_UEID_TYPE_CRC32_POLY_INIT_LSB,
    RRC_EDRX_UEID_TYPE_CRC32_POLY_MSB,
    RRC_EDRX_UEID_TYPE_CRC32_POLY_INIT_MSB,
    RRC_EDRX_UEID_TYPE_CRC32_POLY_INIT_FINAL_XOR_MSB
} rrc_edrx_ueid_type_t;


typedef struct {
    rrc_edrx_ueid_type_t edrx_ueid_type;
    rrc_edrx_ueid_bo_t edrx_ueid_bo;
} rrc_kv_crc_cfg_type_t;

typedef struct {
    rrc_kv_plmn_id_t plmn;
    osal_u8 number_earfcn;
    osal_u8 index;
    nb_iot_earfcn earfcns[5];
} rrc_kv_plmn_earfcn_mapping_item_t;

typedef struct {
    osal_u8 number_item;
    osal_u8 index;
    rrc_kv_plmn_earfcn_mapping_item_t item[3];
} rrc_kv_plmn_earfcn_mapping_t;




typedef struct {
    osal_s8 meas_threshold_sinr_db;
    osal_s8 meas_offset_sinr_db;
    osal_u8 max_sinr_enable_times;
    osal_u8 max_sinr_disable_times;
} rrc_intra_inter_snr_config_x_t;




























typedef struct {
    osal_u8 value;
} uint8_es;

typedef struct {
    osal_u16 value;
} uint16_es;

typedef struct {
    osal_u32 value;
} uint32_es;

typedef struct {
    osal_bool value;
} bool_es;

typedef osal_u8 generic_array_es;

typedef osal_u8 undetermined_size_buffer[0];

typedef char undetermined_size_string[0];


typedef enum {




    SOC_ERR_SUCCESS = 0,
    SOC_ERR_FAILURE = 0xFFFFFFFF,
    SOC_ERR_MALLOC_FAILURE = 0x80000001,
    SOC_ERR_TIMEOUT = 0x80000002,
    SOC_ERR_MEMCPYS_FAIL = 0x80000003,
    SOC_ERR_MEMSETS_FAIL = 0x80000004,
    SOC_ERR_BUSY = 0x80000005,
    SOC_ERR_INVALID_PARAMETER = 0x80000006,
    SOC_ERR_INSUFFICIENT_DATA = 0x80000007,
    SOC_ERR_INCORRECT_ID = 0x80000008,
    SOC_ERR_INCORRECT_VER = 0x80000009,
    SOC_ERR_BAD_CHECKSUM = 0x8000000A,
    SOC_ERR_BLOCKED = 0x8000000B,
    SOC_ERR_WRONG_CORE = 0x8000000C,
    SOC_ERR_NOT_INITIALISED = 0x8000000D,
    SOC_ERR_INVALID_STATE = 0x8000000E,
    SOC_ERR_NOT_IMPLEMENTED = 0x8000000F,




    SOC_ERR_MEM_INVALID_PARAM = 0x80000081,
    SOC_ERR_MEM_GET_OS_INFO_NOK = 0x80000082,
    SOC_ERR_OS_STAT_INVALID_PARAM = 0x80000083,
    SOC_ERR_OS_MUTEX_ACQUIRE = 0x80000084,
    SOC_ERR_OS_MUTEX_RELEASE = 0x80000085,
    SOC_ERR_OS_GET_TASK_INFO_INVALID_PARAM = 0x80000086,
    SOC_ERR_OS_GET_TASK_INFO_OS_ERR = 0x80000087,



    SOC_ERR_KV_NOT_INITIALISED = 0x80000300,
    SOC_ERR_KV_ERROR_IN_PARAMETERS = 0x80000301,
    SOC_ERR_KV_ERROR_ERASING_PAGE = 0x80000302,
    SOC_ERR_KV_NOT_ENOUGH_SPACE = 0x80000303,
    SOC_ERR_KV_KEY_NOT_FOUND = 0x80000304,
    SOC_ERR_KV_TRYING_TO_MODIFY_A_PERMANENT_KEY = 0x80000305,
    SOC_ERR_KV_WRITE_VETOED = 0x80000306,
    SOC_ERR_KV_DEFRAGMENTATION_NEEDED = 0x80000307,
    SOC_ERR_KV_INVALID_STORE = 0x80000308,
    SOC_ERR_KV_WRITE_BUFFER_NOT_ALLOCATED = 0x80000309,
    SOC_ERR_KV_KEY_HEADER_BUFFER_NOT_ALLOCATED = 0x8000030A,
    SOC_ERR_KV_KEY_DATA_BUFFER_NOT_ALLOCATED = 0x8000030B,
    SOC_ERR_KV_KEY_HASH_BUFFER_NOT_ALLOCATED = 0x8000030C,
    SOC_ERR_KV_WRITE_BUFFER_TOO_SMALL = 0x8000030D,
    SOC_ERR_KV_KEY_HASH_BUFFER_TOO_SMALL = 0x8000030E,
    SOC_ERR_KV_GET_BUFFER_TOO_SMALL = 0x8000030F,
    SOC_ERR_KV_AES_UNAVAILABLE = 0x80000310,
    SOC_ERR_KV_HASH_UNAVAILABLE = 0x80000311,
    SOC_ERR_KV_INVALID_PAGE = 0x80000312,
    SOC_ERR_KV_ZERO_LENGTH_COPY = 0x80000313,
    SOC_ERR_KV_LENGTH_MISMATCH = 0x80000314,
    SOC_ERR_KV_HASH_MISMATCH = 0x80000315,
    SOC_ERR_KV_DATA_MISMATCH = 0x80000316,
    SOC_ERR_KV_SEARCH_PATTERN_MISMATCH = 0x80000317,
    SOC_ERR_KV_SEARCH_KEY_TYPE_MISMATCH = 0x80000318,
    SOC_ERR_KV_SEARCH_KEY_STATE_MISMATCH = 0x80000319,
    SOC_ERR_KV_INVALID_KEY_HEADER = 0x8000031A,
    SOC_ERR_KV_PAGE_NOT_FOUND = 0x8000031B,
    SOC_ERR_KV_STATE_INVALID = 0x8000031C,
    SOC_ERR_KV_KEY_NOT_IN_WRITE_QUEUE = 0x8000031D,
    SOC_ERR_KV_BUFFER_PRIMED_PREMATURELY = 0x8000031E,
    SOC_ERR_KV_FAILURE = 0x8000031F,





    SOC_ERR_IO_NOT_INIT = 0x80001041,
    SOC_ERR_IO_INVALID_PARAMETER = 0x80001042,
    SOC_ERR_IO_RELEASE_ERROR = 0x80001043,
    SOC_ERR_IO_SET_FUNC_ERROR = 0x80001044,
    SOC_ERR_IO_GET_FUNC_ERROR = 0x80001045,
    SOC_ERR_IO_GET_PULL_ERROR = 0x80001046,
    SOC_ERR_IO_GET_STRENGTH_ERROR = 0x80001047,
    SOC_ERR_IO_GET_SLEW_ERROR = 0x80001048,
    SOC_ERR_IO_GET_TRIGGER_ERROR = 0x80001049,
    SOC_ERR_IO_FAILURE = 0x8000104A,


    SOC_ERR_GPIO_NOT_INIT = 0x80001081,
    SOC_ERR_GPIO_INVALID_PARAMETER = 0x80001082,
    SOC_ERR_GPIO_PIN_ERROR = 0x80001083,
    SOC_ERR_GPIO_DIR_ERROR = 0x80001084,
    SOC_ERR_GPIO_FAILURE = 0x80001085,


    SOC_ERR_UART_INVALID_PARAMETER = 0x800010C1,
    SOC_ERR_UART_INVALID_SUSPEND = 0x800010C2,
    SOC_ERR_UART_INVALID_PARITY = 0x800010C3,
    SOC_ERR_UART_INVALID_DATA_BITS = 0x800010C4,
    SOC_ERR_UART_INVALID_STOP_BITS = 0x800010C5,
    SOC_ERR_UART_INVALID_BAUD = 0x800010C6,
    SOC_ERR_UART_INVALID_COM_PORT = 0x800010C7,
    SOC_ERR_UART_SW_BUF_CREATE_FAIL = 0x800010C8,
    SOC_ERR_UART_NOT_SUPPORT = 0x800010C9,
    SOC_ERR_UART_INVALID_ID = 0x800010CA,
    SOC_ERR_UART_CREATE_EVENT_FAIL = 0x800010CB,
    SOC_ERR_UART_OPEN_TX_DMA_CHN_FAIL = 0x800010CC,
    SOC_ERR_UART_CLOSE_TX_DMA_CHN_FAIL = 0x800010CD,
    SOC_ERR_UART_TX_DMA_NOT_ENABLED = 0x800010CE,
    SOC_ERR_UART_CFG_NOT_SUPPORT_NONE_FIFO = 0x800010CF,
    SOC_ERR_UART_DRIVER_RESOURCE_REINIT = 0x800010D1,
    SOC_ERR_UART_DEVICE_RESOURCE_REINIT = 0x800010D2,
    SOC_ERR_UART_INVALID_FLOW_CTRL = 0x800010D3,
    SOC_ERR_UART_BUF_DEINIT_FAIL = 0x800010D4,
    SOC_ERR_UART_DEINIT_WRITTING_READING = 0x800010D5,
    SOC_ERR_UART_SEND_XON_FAIL = 0x800010D6,
    SOC_ERR_UART_SEND_XOFF_FAIL = 0x800010D7,
    SOC_ERR_UART_MEM_OPT_FAIL = 0x800010D8,
    SOC_ERR_UART_RX_BUF_NOT_CREATED = 0x800010D9,


    SOC_ERR_SPI_NOT_INIT = 0x80001101,
    SOC_ERR_SPI_INVALID_PARAMETER = 0x80001102,
    SOC_ERR_SPI_PIN_ERROR = 0x80001103,
    SOC_ERR_SPI_BUSY = 0x80001104,
    SOC_ERR_SPI_FAILURE = 0x80001105,
    SOC_ERR_SPI_ALREADY_INIT = 0x80001106,
    SOC_ERR_SPI_WRITE_TIMEOUT = 0x80001107,
    SOC_ERR_SPI_READ_TIMEOUT = 0x80001108,
    SOC_ERR_SPI_MODE_ERROR = 0x80001109,
    SOC_ERR_SPI_DMA_OPEN_FAILURE = 0x8000110A,
    SOC_ERR_SPI_DMA_TRANSFER_FAILURE = 0x8000110B,


    SOC_ERR_I2C_NOT_INIT = 0x80001141,
    SOC_ERR_I2C_INVALID_PARAMETER = 0x80001142,
    SOC_ERR_I2C_PIN_ERROR = 0x80001143,
    SOC_ERR_I2C_BUSY_ERROR = 0x80001144,
    SOC_ERR_I2C_SEND_DATA_ERROR = 0x80001145,
    SOC_ERR_I2C_RECEIVE_DATA_ERROR = 0x80001146,
    SOC_ERR_I2C_ACK_ERROR = 0x80001147,
    SOC_ERR_I2C_ARB_ERROR = 0x80001148,
    SOC_ERR_I2C_TIMEOUT_ERROR = 0x80001149,
    SOC_ERR_I2C_FAILURE = 0x8000114A,
    SOC_ERR_I2C_IS_INITIALIZED = 0x8000114B,


    SOC_ERR_PWM_NOT_INIT = 0x80001181,
    SOC_ERR_PWM_INVALID_PARAMETER = 0x80001182,
    SOC_ERR_PWM_PIN_ERROR = 0x80001183,
    SOC_ERR_PWM_FAILURE = 0x80001184,
    SOC_ERR_PWM_UNSUPPORT_DUTY_RATIO = 0x80001185,


    SOC_ERR_FLASH_NOT_INIT = 0x800011C1,
    SOC_ERR_FLASH_INVALID_PARAMETER = 0x800011C2,
    SOC_ERR_FLASH_NOT_ENOUGH_SPACE = 0x800011C3,
    SOC_ERR_FLASH_ERASE_TIMEOUT = 0x800011C4,
    SOC_ERR_FLASH_WRITE_TIMEOUT = 0x800011C5,
    SOC_ERR_FLASH_FAILURE = 0x800011C6,


    SOC_ERR_DMA_INVALID_PARA = 0x80001201,
    SOC_ERR_DMA_NOT_INIT = 0x80001202,
    SOC_ERR_DMA_BUSY = 0x80001203,
    SOC_ERR_DMA_TRANSFER_FAIL = 0x80001204,
    SOC_ERR_DMA_TRANSFER_TIMEOUT = 0x80001205,
    SOC_ERR_DMA_GET_NOTE_FAIL = 0x80001206,
    SOC_ERR_DMA_LLI_NOT_CREATE = 0x80001207,
    SOC_ERR_DMA_NO_AVAIL_CONTROLLER = 0x80001208,
    SOC_ERR_DMA_NO_AVAIL_CH = 0x80001209,
    SOC_ERR_DMA_UNSUPPORTED_PERIPHERAL = 0x8000120A,
    SOC_ERR_DMA_NOT_SUPPORTED_CONFIG = 0x8000120B,
    SOC_ERR_DMA_ERROR_CONFIG = 0x8000120C,
    SOC_ERR_DMA_INCOMPLETE_CONFIG = 0x8000120D,

    SOC_ERR_DMA_ONE_TIME_BATCHED_CONFIGS_EXCEEDED = 0x8000120E,

    SOC_ERR_DMA_CONFIG_QUEUE_FULL = 0x8000120F,

    SOC_ERR_DMA_OUT_OF_MEMORY = 0x80001210,
    SOC_ERR_DMA_NO_AVAIL_FREE_CONFIG = 0x80001211,

    SOC_ERR_DMA_CHANNEL_NOT_OPEN = 0x80001212,
    SOC_ERR_DMA_SLEEP_VETO_ERR = 0x80001213,


    SOC_ERR_WDT_PARA_ERROR = 0x80001241,


    SOC_ERR_HWI_INVALID_NUM = 0x80001281,


    SOC_ERR_TIMER_NO_VALID_TIMER = 0x800012C1,
    SOC_ERR_TIMER_INVALID_PARAMETER = 0x800012C2,


    SOC_ERR_SOC_COPY_INVALID_PARA = 0x80001301,
    SOC_ERR_SOC_COPY_BUSY = 0x80001302,
    SOC_ERR_SOC_COPY_ERR = 0x80001303,


    SOC_ERR_SWI_INVALID_ID = 0x80001341,


    SOC_ERR_ANALOG_MUTEX_ERROR = 0x80001381,
    SOC_ERR_ANALOG_RESOURCE_BUSY = 0x80001382,
    SOC_ERR_ANALOG_RESOURCE_CONNECT_ERROR = 0x80001383,
    SOC_ERR_ANALOG_RESOURCE_FREE_ERROR = 0x80001384,
    SOC_ERR_ANALOG_VOL_TYPE_ERROR = 0x80001385,
    SOC_ERR_ANALOG_READ_VOL_ERROR = 0x80001386,
    SOC_ERR_ANALOG_AIO_PIN_ERROR = 0x80001387,
    SOC_ERR_ANALOG_IDRV_INVALID_RANGE = 0x80001388,
    SOC_ERR_ANALOG_COMP_NUMBER_ERROR = 0x80001389,
    SOC_ERR_ANALOG_COMP_INVALID_RANGE = 0x8000138A,
    SOC_ERR_ANALOG_VALUE_SET_ERROR = 0x8000138B,
    SOC_ERR_ANALOG_CORE_NOT_SUPPORT = 0x8000138C,
    SOC_ERR_ANALOG_PARAMETER_ERROR = 0x8000138D,
    SOC_ERR_ANALOG_FUNC_UNREADY_ERROR = 0x8000138E,
    SOC_ERR_ANALOG_ADC_TIME_OUT_ERROR = 0x8000138F,
    SOC_ERR_ANALOG_ADC_NOT_CALIBRATE_ERROR = 0x80001391,
    SOC_ERR_ANALOG_RESOURCE_NOT_OWNED_ERROR = 0x80001392,
    SOC_ERR_ANALOG_COMP_NOT_SET_AIO_PIN = 0x80001393,
    SOC_ERR_ANALOG_OTP_VALUE_GET_ERROR = 0x80001394,
    SOC_ERR_ANALOG_AIO_FUNC_ERROR = 0x80001395,


    SOC_ERR_PATCH_INVALI_PARAM = 0x800013C1,
    SOC_ERR_PATCH_NOT_ENOUGH_PATCH = 0x800013C2,


    SOC_ERR_EDGE_NOT_INIT = 0x80001401,
    SOC_ERR_EDGE_INVALID_PARAMETER = 0x80001402,
    SOC_ERR_EDGE_ERROR = 0x80001403,


    SOC_ERR_RPC_BLE_NOT_INITIALISED = 0x80001421,
    SOC_ERR_RPC_BLE_PARAMETERS_ERROR = 0x80001422,
    SOC_ERR_RPC_BLE_NOT_ENOUGH_SPACE = 0x80001423,
    SOC_ERR_RPC_BLE_NO_NEXT_MESSAGE = 0x80001424,
    SOC_ERR_RPC_BLE_CORRUPT_SHARED_MEMORY = 0x80001425,
    SOC_ERR_RPC_BLE_WAIT_TIMEOUT = 0x80001426,
    SOC_ERR_RPC_BLE_OS_SEMAPHORE_ERROR = 0x80001427,
    SOC_ERR_FLASH_TASK_DISCARD = 0x80002040,





    SOC_ERR_FLASH_TASK_DISCARDED = 0x80002041,




    SOC_ERR_FLASH_TASK_READY = 0x80002042,





    SOC_ERR_FLASH_TASK_BEING_PROCESSED = 0x80002043,





    SOC_ERR_FLASH_TASK_COMPLETED = 0x80002044,




    SOC_ERR_FLASH_TASK_WRONG_STRUCT_IDENTIFIER = 0x80002045,

    SOC_ERR_FLASH_TASK_NO_MORE_TASKS = 0x80002046,

    SOC_ERR_FLASH_TASK_ONLY_PENDING_TASKS = 0x80002047,

    SOC_ERR_FLASH_TASK_IN_PROGRESS = 0x80002048,

    SOC_ERR_FLASH_TASK_NOT_FOUND = 0x80002049,

    SOC_ERR_FLASH_TASK_ALREADY_DONE = 0x8000204A,

    SOC_ERR_FLASH_TASK_REQUESTED_QUEUE = 0x8000204B,







    SOC_ERR_CYCBUF_NOT_ENOUGH_HANDLE = 0x80003041,
    SOC_ERR_CYCBUF_INVALID_HANDLE = 0x80003042,
    SOC_ERR_CYCBUF_MALLOC_FAIL = 0x80003043,
    SOC_ERR_CYCBUF_BUSY = 0x80003044,
    SOC_ERR_CYCBUF_NO_DATA = 0x80003045,
    SOC_ERR_CYCBUF_MEMOPT_FAIL = 0x80003046,
    SOC_ERR_CYCBUF_SUB_INVALID_FREE_LEN = 0x80003047,
    SOC_ERR_CYCBUF_SUB_INVALID_USED_LEN = 0x80003048,


    SOC_ERR_IRQ_REQUEST_FAIL = 0x80003081,
    SOC_ERR_IRQ_FREE_FAIL = 0x80003082,


    SOC_ERR_RAND_NOT_SUPPORT_CRYPT_RAND = 0x800030c1,

    SOC_ERR_CORE_MUTEX_INVALID_ID = 0x80003101,
    SOC_ERR_CORE_MUTEX_GET_FAIL = 0x80003102,
    SOC_ERR_CORE_MUTEX_GET_TIME_OUT = 0x80003103,

    SOC_ERR_TRACK_INIT_FAIL = 0x80003141,
    SOC_ERR_TRACK_START_FAIL = 0x80003142,
    SOC_ERR_TRACK_DEINIT_FAIL = 0x80003143,
    SOC_ERR_TRACK_GET_INFO_FAIL = 0x80003144,
    SOC_ERR_TRACK_RECORD_FAIL = 0x80003145,


    SOC_ERR_DIAG_STAT_INVALID_ID = 0x80003181,
    SOC_ERR_DIAG_NO_INITILIZATION = 0x80003182,
    SOC_ERR_DIAG_NOT_FOUND = 0x80003183,
    SOC_ERR_DIAG_INVALID_PARAMETER = 0x80003184,


    SOC_ERR_DIAG_CONSUMED = 0x80003185,
    SOC_ERR_DIAG_TOO_SMALL_BUFFER = 0x80003186,
    SOC_ERR_DIAG_NO_MORE_DATA = 0x80003187,
    SOC_ERR_DIAG_NOT_ENOUGH_MEMORY = 0x80003188,
    SOC_ERR_DIAG_INVALID_HEAP_ADDR = 0x80003189,
    SOC_ERR_DIAG_NOT_CONNECT = 0x8000318a,
    SOC_ERR_DIAG_BUSY = 0x8000318b,
    SOC_ERR_DIAG_TOO_LARGE_FRAME = 0x8000318c,
    SOC_ERR_DIAG_RAM_ALIGN = 0x8000318d,
    SOC_ERR_DIAG_NOT_SUPPORT = 0x8000318e,
    SOC_ERR_DIAG_QUEUE_FULL = 0x8000318f,
    SOC_ERR_DIAG_MSG_CFG_NOT_ALLOW = 0x80003190,
    SOC_ERR_DIAG_TOO_LARGE_MSG = 0x80003191,
    SOC_ERR_DIAG_INVALID_CODE_ADDR = 0x80003192,
    SOC_ERR_DIAG_OBJ_NOT_FOUND = 0x80003193,
    SOC_ERR_DIAG_BLOCK_EMPTY = 0x80003194,
    SOC_ERR_DIAG_NOT_ENOUGH_SHARE_SPACE = 0x80003195,
    SOC_ERR_DIAG_CORRUPT_SHARED_MEMORY = 0x80003196,
    SOC_ERR_DIAG_NO_NEXT_MESSAGE = 0x80003197,
    SOC_ERR_DIAG_KV_NOT_SUPPORT_ID = 0x80003198,
    SOC_ERR_DIAG_BAD_DATA = 0x80003199,
    SOC_ERR_DIAG_MEMMOVE_FAIL = 0x8000319a,
} soc_errno;
typedef enum {

    FLASH_TASK_KV_DATA = 0,

    FLASH_TASK_KV_ATTRIBUTE,

    FLASH_TASK_KV_ERASE,

    FLASH_TASK_KV_ERASE_ALL,

    FLASH_TASK_FOTA_DATA,

    FLASH_TASK_FOTA_ERASE,

    FLASH_TASK_ACPU_DATA,

    FLASH_TASK_ACPU_ERASE,

    FLASH_TASK_NUM_TYPES,
} flash_task_type;


typedef osal_u16 kv_storage_key;

typedef struct {
    const osal_u8 *kvalue;
    kv_storage_key key;
    osal_u16 kvalue_length;
    osal_u8 attribute;
} flash_task_kv_data;

typedef struct {
    kv_storage_key key;
    osal_u8 attribute;
} flash_task_kv_attribute;

typedef struct {
    kv_storage_key key;
} flash_task_kv_erase;

typedef struct {
    kv_storage_key key;
} flash_task_kv_backup;

typedef struct {

    osal_u8 magic_value[10];
} kv_erase_all;

typedef struct {
    osal_u8 *src;
    osal_u8 *dst;
    osal_u16 length;
} flash_task_flash_data;

typedef struct {
    osal_u32 start_address;
    osal_u32 length;
} flash_task_flash_erase;

typedef union {
    flash_task_kv_data kv;
    flash_task_kv_attribute kv_attribute;
    flash_task_kv_erase kv_erase;
    flash_task_kv_backup kv_backup;
    flash_task_flash_data flash;
    flash_task_flash_erase flash_erase;
} task_node_data;

typedef struct owner_callback_data owner_callback;
typedef soc_errno (*flash_task_completed_callback)(soc_errno result, owner_callback *callback);

struct owner_callback_data {

    flash_task_completed_callback func;

};

typedef struct flash_task_description flash_task_node;
struct flash_task_description {

    osal_u32 identifier;

    volatile flash_task_node* volatile next;







    owner_callback *owner_callback;
    volatile osal_u32 state_code;

    flash_task_type task;

    task_node_data data;

    osal_u32 checksum;
};


typedef struct {
    osal_u32 id;
    osal_u32 struct_ver;
    osal_u32 process_req;
    osal_u32 result_code;
    osal_u32 sebl_tasks;
    osal_u32 semain_tasks;
    osal_u8 key_areas[0x4C0];
    osal_u32 kv_tasks_result;

    osal_u8 reserved[4];
} fota_section_header;


typedef enum {

    SOC_ID_TYPE_SERIAL_NUMBER = 0,

    SOC_ID_TYPE_PACKED_IMEI,

    SOC_ID_TYPE_PACKED_SVN,
    SOC_ID_MAX_SETTABLE = SOC_ID_TYPE_PACKED_SVN,

    SOC_ID_TYPE_DIEID,

    SOC_ID_SEC_ROM_VER,

    SOC_ID_SEC_DIGITAL_VER,

    SOC_ID_SEC_SUPPORTED_RPC_VER,

    SOC_ID_SEC_CURRENT_RPC_VER,

    SOC_ID_SEBL_VER,

    SOC_ID_SEMAIN_VER,

    SOC_ID_SERECOVERY_VER,

    SOC_ID_PCPU_VER,

    SOC_ID_ACPU_VER,

    SOC_ID_PARAM_CHK,

    SOC_ID_SEBL_CODE_HDR_CHK,

    SOC_ID_SEMAIN_CODE_HDR_CHK,

    SOC_ID_SERECOVERY_CODE_HDR_CHK,

    SOC_ID_PCPU_CODE_HDR_CHK,

    SOC_ID_ACPU_CODE_HDR_CHK,

    SOC_ID_SEBL_SIGN_CHK,

    SOC_ID_SEMAIN_SIGN_CHK,

    SOC_ID_SERECOVERY_SIGN_CHK,

    SOC_ID_PCPU_SIGN_CHK,

    SOC_ID_ACPU_SIGN_CHK,

    SOC_ID_CHIP_TYPE,


    SOC_ID_NUM,

    SOC_ID_UNKNOWN
} soc_id_type;

typedef enum {
    SOC_ID_CONFIG_FLASH_NON_PERM = 0,
    SOC_ID_CONFIG_FLASH_PERM,
    SOC_ID_CONFIG_OTP
} soc_ntpermid_type;

typedef enum {
    SOC_ID_NB_BLE = 0,
    SOC_ID_NB_ONLY,
    SOC_ID_NB_BLE_GNSS
} soc_chip_type;


typedef enum U8 {
    SOC_IO_PIN_0 = 0,
    SOC_IO_PIN_1 = 1,
    SOC_IO_PIN_2 = 2,
    SOC_IO_PIN_3 = 3,
    SOC_IO_PIN_4 = 4,
    SOC_IO_PIN_5 = 5,
    SOC_IO_PIN_6 = 6,
    SOC_IO_PIN_7 = 7,
    SOC_IO_PIN_8 = 8,
    SOC_IO_PIN_9 = 9,
    SOC_IO_PIN_10 = 10,
    SOC_IO_PIN_11 = 11,
    SOC_IO_PIN_12 = 12,
    SOC_IO_PIN_13 = 13,
    SOC_IO_PIN_14 = 14,
    SOC_IO_PIN_15 = 15,
    SOC_IO_PIN_16 = 16,
    SOC_IO_PIN_17 = 17,
    SOC_IO_PIN_18 = 18,
    SOC_IO_PIN_19 = 19,
    SOC_IO_PIN_20 = 20,
    SOC_IO_PIN_21 = 21,
    SOC_IO_PIN_22 = 22,
    SOC_IO_PIN_23 = 23,
    SOC_IO_PIN_24 = 24,
    SOC_IO_PIN_25 = 25,
    SOC_IO_PIN_26 = 26,
    SOC_IO_PIN_27 = 27,
    SOC_IO_PIN_28 = 28,
    SOC_IO_PIN_29 = 29,
    SOC_IO_PIN_30 = 30,
    SOC_IO_PIN_31 = 31,
    SOC_IO_PIN_32 = 32,
    SOC_IO_PIN_33 = 33,
    SOC_IO_PIN_34 = 34,
    SOC_IO_PIN_35 = 35,
    SOC_IO_PIN_36 = 36,
    SOC_IO_PIN_37 = 37,
    SOC_IO_PIN_38 = 38,
    SOC_IO_PIN_39 = 39,
    SOC_IO_PIN_NONE = 40,
} soc_io_pin;


typedef enum U8 {
    PMU_VDD_IO_BANK_F = 0,
    PMU_VDD_IO_BANK_A = 1,
    PMU_VDD_IO_BANK_B = 2,
    PMU_VDD_IO_BANK_C = 3,
    PMU_VDD_IO_BANK_D = 4,

    PMU_VDD_IO_BANK_UNKNOWN = 5
} pmu_vdd_io_bank;




typedef enum U8 {
    PMU_VDD_IO_LEVEL_1V5 = 0,
    PMU_VDD_IO_LEVEL_1V8 = 1,
    PMU_VDD_IO_LEVEL_1V875 = 2,
    PMU_VDD_IO_LEVEL_1V95 = 3,
    PMU_VDD_IO_LEVEL_2V1 = 4,
    PMU_VDD_IO_LEVEL_2V7 = 5,
    PMU_VDD_IO_LEVEL_3V0 = 6,
    PMU_VDD_IO_LEVEL_3V3 = 7,
    PMU_VDD_IO_LEVEL_1V8_BYPASS = 8,
    PMU_VDD_IO_LEVEL_VBAT = 9,
    PMU_VDD_IO_LEVEL_OFF = 10,
    PMU_VDD_IO_LEVEL_UNKNOWN = 11,
} pmu_vdd_io_level;


typedef enum {
    SECURITY_KEYS_UE_BLE_AUTH_SIZE_KEY = 0x1A02,
    SECURITY_KEYS_UE_BLE_AUTH_VALUE_KEY = 0x1A03,




    SECURITY_KEYS_UE_SERIAL_NUMBER_KEY = 0x2100,
    SECURITY_KEYS_UE_PACKED_IMEI_KEY = 0x2101,
    SECURITY_KEYS_UE_PACKED_SVN_KEY = 0x2102,





    SECURITY_KEYS_MAX = 0xffff
} security_keys;





typedef struct {
    osal_u8 value[16];
} security_keys_ue_serial_number;

typedef struct {
    osal_u8 value[8];
} security_keys_ue_packed_imei;

typedef struct {
    osal_u8 value[1];
} security_keys_ue_packed_svn;








typedef enum {


    SOC_SYSTEM_INFO_PAD_BYTE = 0,

    SOC_SYSTEM_INFO_ATE_COMP_REF,

    SOC_SYSTEM_INFO_ATE_IDRV,

    SOC_SYSTEM_INFO_ATE_VREF,

    SOC_SYSTEM_INFO_ATE_TEMP_COEFF_A,

    SOC_SYSTEM_INFO_ATE_TEMP_COEFF_B,

    SOC_SYSTEM_INFO_ATE_RTC_FREQ_TRIM,

    SOC_SYSTEM_INFO_BEST_CAL_RTC_FREQ,

    SOC_SYSTEM_INFO_ATE_NUM_WAIT_CLKS,

    SOC_SYSTEM_INFO_ATE_RF_BANDGAP_VOLTAGE,

    SOC_SYSTEM_INFO_ATE_RF_RCAL,

    SOC_SYSTEM_INFO_CORE_MAPPED_MEM_INFO,

    SOC_SYSTEM_INFO_KV_INFO,

    SOC_SYSTEM_INFO_IMAGE_INFO_SEBL,

    SOC_SYSTEM_INFO_IMAGE_INFO_SEMAIN,

    SOC_SYSTEM_INFO_IMAGE_INFO_SERECOVERY,

    SOC_SYSTEM_INFO_IMAGE_INFO_PCPU,

    SOC_SYSTEM_INFO_IMAGE_INFO_ACPU,


    SOC_SYSTEM_INFO_NUM_VALUES
} soc_system_info;

typedef struct {

    osal_u32 exe_start;
    osal_u32 exe_length;


    osal_u32 storage_start;
    osal_u32 storage_length;


    osal_u32 fota_start;
    osal_u32 fota_length;

    osal_u32 pcpu_data_start;
    osal_u32 pcpu_data_length;

    osal_u32 ram0_start;
    osal_u32 ram0_length;

    osal_u32 ram1_start;
    osal_u32 ram1_length;


    osal_u32 shared_ram_start;
    osal_u32 shared_ram_length;
} soc_system_info_core_mapped_mem_info;


typedef struct {
    osal_u8 dummy;
} soc_system_info_kv_info;


typedef enum U8 {
    SOC_LOG_LEVEL_NONE,
    SOC_LOG_LEVEL_VERBOSE,
    SOC_LOG_LEVEL_NORMAL,
    SOC_LOG_LEVEL_WARNING,
    SOC_LOG_LEVEL_ERROR,
    SOC_LOG_LEVEL_CUSTOM,
    SOC_LOG_MAX,
} SOC_LOG_LEVEL;

typedef struct {
    SOC_LOG_LEVEL value;
} soc_log_level_es;


typedef enum {

    SOC_RET_OK = 0x0,
    SOC_RET_ERROR = 0x1,
    SOC_RET_ERROR_RPC = 0x2,
    SOC_RET_ERROR_IN_PARAMETERS = 0x3,
    SOC_RET_ILLEGAL_OPERATION = 0x4,
    SOC_RET_RETRY_LATER = 0x5,
    SOC_RET_RETRY_AFTER_DEEP_SLEEP = 0x6,
    SOC_RET_KEY_NOT_FOUND = 0x7,
    SOC_RET_FLOW_CONTROL = 0x8,
    SOC_RET_IN_PROGRESS = 0x9,
    SOC_RET_NO_NETWORK_SERVICE = 0xA,
    SOC_RET_INVALID_ENTRY = 0xB,
    SOC_RET_OUT_OF_RANGE = 0xC,
    SOC_RET_MEMORY_ERROR = 0xD,
    SOC_RET_DISABLED_OPERATION = 0xE,
    SOC_RET_NOT_POWER_ON = 0xF,
    SOC_RET_KV_FLASH_FULL = 0x10,
    SOC_RET_CID_ACTIVE = 0x11,
    SOC_RET_RADIO_TEST_STATE_ERROR = 0x12,
    SOC_RET_RADIOTEST_DISABLED = 0x13,
    SOC_RET_NONIP_UNCONFIG = 0x14,
    SOC_RET_NONIP_NOT_REGISTERED = 0x15,
    SOC_RET_SIM_PIN_REQUIRED = 0x16,
    SOC_RET_CID_NOT_DEFINED = 0x17,
    SOC_RET_CID_NOT_ACTIVE = 0x18,
    SOC_RET_CID_INVALID = 0x19,
    SOC_RET_DEACTIVE_LAST_ACTIVE_CID = 0x1A,
    SOC_RET_IN_PROGRESS_BLOCK = 0x1B,
    SOC_RET_ABORT_BY_USER = 0x1C,
    SOC_RET_ABORT_BY_USER_FAILED = 0x1D,
    SOC_RET_DATA_SEQUENCE_REPEAT_ERROR = 0x1E,
    SOC_RET_NO_COMMAND_TO_ABORT = 0x1F,
    SOC_RET_COMMAND_UNABORTABLE = 0x20,
    SOC_RET_COMMAND_INTERRUPTED = 0x21,
    SOC_RET_PROTOCOL_FAMILY_UNMATCHING = 0x22,
    SOC_RET_KEY_WRONG_SIZE = 0x23,
    SOC_RET_KEY_TOO_BIG = 0x24,
    SOC_RET_CONFIGURATION_CONFLICTS = 0x25,
    SOC_RET_SMS_NO_CNMA_ACKNOWLEDGEMENT_EXPECTED = 0x26,
    SOC_RET_SIM_PUK_REQUIRED = 0x27,
    SOC_RET_SIM_PUK_BLOCKED = 0x28,
    SOC_RET_NOT_MIPI_MODULE = 0x29,
    SOC_RET_FILE_NOT_FOUND = 0x2A,
    SOC_RET_NOT_INITIALISED = 0x2B,
    SOC_RET_CONDITIONS_OF_USE_NOT_SATISFIED = 0x2C,
    SOC_RET_SECUREBOOT_CERTIFICATE_INVALID = 0x2D,
    SOC_RET_SECUREBOOT_INCORRECT_CERTIFICATE = 0x2E,
    SOC_RET_SECUREBOOT_SIGNATURE_INVALID = 0x2F,
    SOC_RET_SECUREBOOT_ASSETSTORE_ERROR = 0x30,
    SOC_RET_SECUREBOOT_KEYSTORE_INVALID = 0x31,
    SOC_RET_SECUREBOOT_KEYSTORE_NOT_FOUND = 0x32,
    SOC_RET_SECUREBOOT_ASSET_INVALID = 0x33,
    SOC_RET_SECUREBOOT_ASSET_NOT_FOUND = 0x34,
    SOC_RET_LWSIM_ERR_DEBUG_ENABLED = 0x35,
    SOC_RET_LWSIM_ERR_DATA_NOT_AVAILABLE = 0x36,
    SOC_RET_LWSIM_ERR_NO_PROFILE_LOADED = 0x37,
    SOC_RET_LWSIM_ERR_INVALID_KPUB_CI = 0x38,
    SOC_RET_LWSIM_ERR_INVALID_KPUB_DP = 0x39,
    SOC_RET_LWSIM_ERR_INVALID_E_KPUB_DP = 0x3A,
    SOC_RET_LWSIM_ERR_MAC_FAILURE = 0x3B,
    SOC_RET_LWSIM_ERR_EAGLE_LOCKED = 0x3C,
    SOC_RET_LWSIM_ERR_PROFILE_ERROR = 0x3D,
    SOC_RET_LWSIM_ERR_ATTEMPTS_EXCEEDED = 0x3E,
    SOC_RET_LWSIM_ERR_REPLAY_DETECTED = 0x3F,
    SOC_RET_LWSIM_ERR_PROFILE_LIMIT = 0x40,
    SOC_RET_KV_ALL_WRITTEN = 0x41,
    SOC_RET_NOT_IMPLEMENTED = 0x42,
    SOC_RET_ROMLIB_ARBITRATION_RELEASE_FAILED = 0x43,
    SOC_RET_ROMLIB_ALREADY_IN_USE = 0x44,
    SOC_RET_ROMLIB_INVALID_PARAMETER = 0x45,
    SOC_RET_ROMLIB_RELEASE_ERROR = 0x46,
    SOC_RET_ROMLIB_SET_FUNC_ERROR = 0x47,
    SOC_RET_ROMLIB_GET_FUNC_ERROR = 0x48,
    SOC_RET_ROMLIB_GET_PULL_ERROR = 0x49,
    SOC_RET_ROMLIB_GET_STRENGTH_ERROR = 0x4A,
    SOC_RET_ROMLIB_GET_SLEW_ERROR = 0x4B,
    SOC_RET_ROMLIB_GET_TRIGGER_ERROR = 0x4C,
    SOC_RET_ROMLIB_FAILURE = 0x4D,
    SOC_RET_ROMLIB_PIN_ERROR = 0x4E,
    SOC_RET_ROMLIB_DIR_ERROR = 0x4F,
    SOC_RET_ROMLIB_INVALID_POINT = 0x50,
    SOC_RET_ROMLIB_NO_AVAILABLE_RNG = 0x51,
    SOC_RET_ROMLIB_FAILED_MEM = 0x52,
    SOC_RET_ROMLIB_OVERFLOW = 0x53,
    SOC_RET_ROMLIB_UNSUPPORTED = 0x54,
    SOC_RET_ROMLIB_REGISTER_IRQ = 0x55,
    SOC_RET_ROMLIB_ILLEGAL_KEY = 0x56,
    SOC_RET_ROMLIB_INVALID_ADDR = 0x57,
    SOC_RET_ROMLIB_INVALID_LENGTH = 0x58,
    SOC_RET_ROMLIB_ILLEGAL_DATA = 0x59,
    SOC_RET_ROMLIB_RSA_SIGN = 0x5A,
    SOC_RET_ROMLIB_RSA_VERIFY = 0x5B,
    SOC_RET_ROMLIB_RESULT_WARNING = 0x5C,
    SOC_RET_ROMLIB_FLUSH_DCACHE_FAILED = 0x5D,
    SOC_RET_ROMLIB_INVALID_K = 0x5E,
    SOC_RET_ROMLIB_INVALID_LEN_CFG = 0x5F,
    SOC_RET_ROMLIB_INVALID_MODE = 0x60,
    SOC_RET_ROMLIB_INVALID_P = 0x61,
    SOC_RET_ROMLIB_INVALID_N = 0x62,
    SOC_RET_ROMLIB_INVALID_CRC = 0x63,
    SOC_RET_ROMLIB_INVALID_DATA_LEN = 0x64,
    SOC_RET_ROMLIB_INFINITE_DOT = 0x65,
    SOC_RET_ROMLIB_IN_DOT_NOT_ON_CURVE = 0x66,
    SOC_RET_ROMLIB_OUT_DOT_NOT_ON_CURVE = 0x67,
    SOC_RET_ROMLIB_NO_RESULT = 0x68,
    SOC_RET_ROMLIB_INVALID_N_IN_INV_MOD = 0x69,
    SOC_RET_ROMLIB_INVALID_PM = 0x6A,
    SOC_RET_ROMLIB_INVALID_X = 0x6B,
    SOC_RET_ROMLIB_INVALID_HPI = 0x6C,
    SOC_RET_WRONG_CORE = 0x6D,
    SOC_RET_TIMEOUT = 0x6E,
    SOC_RET_RESTART_SEQUENCE = 0x6F,
    SOC_RET_TAKE_SEMAPHORE_FAIL = 0x70,
    SOC_RET_GIVE_SEMAPHORE_FAIL = 0x71,
    SOC_RET_BUSY = 0x72,
    SOC_RET_INSUFFICIENT_DATA = 0x73,
    SOC_RET_INCORRECT_ID = 0x74,
    SOC_RET_INCORRECT_VER = 0x75,
    SOC_RET_BAD_CHECKSUM = 0x76,
    SOC_RET_SUPPORT_DISABLED_IN_CUSTOM_BUILD = 0x77,
    SOC_RET_BACK_OFF = 0x78,
    SOC_RET_ERR_NOT_IDLE_MODE = 0x79,
    SOC_RET_ERR_KV_GET_BUFFER_TOO_SMALL = 0x7A,
    SOC_RET_ERR_KV_KEY_NOT_FOUND = 0x7B,
    SOC_RET_NOT_KNOWN = 0x7C,
    SOC_RET_KV_TRYING_TO_MODIFY_A_PERMANENT_KEY = 0x7D,


    SOC_RET_SIM_LOCKED = 0xC0,
    SOC_RET_SIM_CARD_NOT_PRESENT = 0xC1,
    SOC_RET_NOT_IN_MIN_STATE = 0xC2,
    SOC_RET_CID_CONFLICT = 0xC3,
    SOC_RET_EN_MAGIC_NO_EQUAL_LP_VALUE = 0xC4,
    SOC_RET_PS_DATA_OFF = 0xC5,

} soc_ret;
typedef struct {
    osal_u32 en_magic;
    osal_u32 en_idle_time;
    osal_u32 en_no_action_time;
} lpc_config_data;


typedef struct ip4_addr {
    osal_u32 addr;
} ip4_addr_t;
typedef struct ip6_addr {
    osal_u32 addr[4];
} ip6_addr_t;






typedef union {
    ip6_addr_t ip6;
    ip4_addr_t ip4;
} u_addr_u;

typedef struct {
    u_addr_u u_addr;
    osal_u8 type;
} ip_addr_t;






typedef enum U8 {
    NO_SIM_LOCK,
    SIM_LOCK_BLOCK_LIST,
    SIM_LOCK_ALLOW_LIST
} sim_lock_mode;

typedef struct {
    osal_u8 len;
    osal_u8 start[15];
    osal_u8 end[15];
} imsi_mask_interval;


typedef struct { 

    osal_bool body;

} BASE_KEYID_PRODUCTION_LOCK_kv;

typedef struct { 

    bt_deep_sleep_kv_config body;

} BLE_KEYID_DEEP_SLEEP_kv;

typedef struct { 

    bt_addr_buffer_t body;

} BLE_KEYID_DEVICE_ADDR_kv;

typedef struct { 

    osal_u8 body;

} DEBUG_KEYID_DEPRECATED_RUNNING_MODE_kv;

typedef struct { 

    osal_bool body;

} DEBUG_KEYID_PROC_WDT_DISABLE_kv;

typedef struct { 

    osal_u32 body;

} DEBUG_KEYID_SYSERR_UNREBOOT_kv;

typedef struct { 

    ll1_intermediate_freq_params body;

} LL1_KEYID_INTERMEDIATE_FREQ_PARAMS_kv;

typedef struct { 

    osal_bool body;

} LL1_KEYID_RACH_SR_SPS_COEXIST_kv;

typedef struct { 

    osal_bool body;

} LL1_KEYID_SNR_ECL_SELECTION_kv;

typedef struct { 

    ll1_ecl_snr_threshold body;

} LL1_KEYID_SNR_THRESHOLD_X10_kv;

typedef struct { 

    SOC_LOG_LEVEL body;

} LOG_KEYID_LOG_LEVEL_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_APN_RATE_CONTROL_SUPPORT_kv;

typedef struct { 

    osal_u16 body;

} NAS_KEYID_BARRING_RELEASE_DELAY_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_BIP_TLS_DATA_CHECK_ENABLE_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_COMBINE_ATTACH_kv;

typedef struct { 

    nas_kv_context_config_t body;

} NAS_KEYID_CONTEXT_CONFIG_kv;

typedef struct { 

    nas_kv_edrx_ptw_config_t body;

} NAS_KEYID_EDRX_PTW_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_LOW_PRIORITY_SUPPORT_kv;

typedef struct { 

    nas_kv_nas_config_t body;

} NAS_KEYID_NAS_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_NAS_HPPLMN_SEARCH_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_NON_IP_NO_SMS_ENABLE_kv;

typedef struct { 

    nas_kv_pco_ie_type_t body;

} NAS_KEYID_PCO_IE_TYPE_kv;

typedef struct { 

    nas_pdp_context_dynamic_param_request_item_config_t body;

} NAS_KEYID_PDP_CONTEXT_DYNAMIC_PARAM_REQUEST_ITEM_CONFIG_kv;

typedef struct { 

    osal_u16 body;

} NAS_KEYID_POWER_OFF_GUARD_TIMER_kv;

typedef struct { 

    nas_kv_psm_edrx_default_value_t body;

} NAS_KEYID_PSM_EDRX_DEFAULT_VALUE_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_PS_DATA_OFF_ACTIVE_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_RLF_UPDATE_CONFIG_kv;

typedef struct { 

    nas_kv_rpm_counts_t body;

} NAS_KEYID_RPM_COUNTS_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_RPM_ENABLED_kv;

typedef struct { 

    nas_kv_rpm_params_t body;

} NAS_KEYID_RPM_PARAMS_kv;

typedef struct { 

    nas_kv_sim_config_t body;

} NAS_KEYID_SIM_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_SIM_DEDICATED_ENABLE_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_SIM_POWER_SAVING_ENABLE_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_SIM_PRESENCE_ENABLE_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_SUPPORT_SMS_kv;

typedef struct { 

    osal_bool body;

} NAS_KEYID_T3245_USED_kv;

typedef struct { 

    nas_ue_capability_config_t body;

} NAS_KEYID_UE_CAPABILITY_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_ADDITIONAL_TRANSMISSION_SIB1_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_CACHE_RESEL_SIBS_SWITCH_kv;

typedef struct { 

    nb_iot_cell_reselection_config_t body;

} NB_IOT_UE_KEYID_CELL_RESELECTION_CONFIG_kv;

typedef struct { 

    nb_iot_nb_category_t body;

} NB_IOT_UE_KEYID_CONFIGURED_NB_CATEGORY_kv;

typedef struct { 

    osal_u8 body;

} NB_IOT_UE_KEYID_CONFIGURED_REL_VER_kv;

typedef struct { 

    osal_u16 body;

} NB_IOT_UE_KEYID_CONN_EST_FAIL_COUNT_kv;

typedef struct { 

    osal_u16 body;

} NB_IOT_UE_KEYID_CONN_EST_FAIL_VALIDITY_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_CP_CONNECTION_REESTABLISHMENT_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_CQI_REPORTING_ENABLED_kv;

typedef struct { 

    nb_iot_ue_data_inactivity_config_t body;

} NB_IOT_UE_KEYID_DATA_INACTIVITY_TIMEOUT_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_EARLY_CONTENTION_RESOLUTION_REPORTING_ENABLED_kv;

typedef struct { 

    nb_iot_ue_kv_edt_config_t body;

} NB_IOT_UE_KEYID_EDT_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_ENHANCED_PHR_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_HEAD_COMPRESS_CONFIG_kv;

typedef struct { 

    nb_iot_hp_band_config_t body;

} NB_IOT_UE_KEYID_HP_BAND_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_INTERFERENCE_RADOMISATION_ENABLED_kv;

typedef struct { 

    osal_u16 body;

} NB_IOT_UE_KEYID_IPV6_GET_PREFIX_TIME_kv;

typedef struct { 

    osal_u16 body;

} NB_IOT_UE_KEYID_L2_BUFFER_DISCARD_LIMIT_kv;

typedef struct { 

    nb_iot_l2_pdu_count_and_bytes_without_poll_t body;

} NB_IOT_UE_KEYID_L2_PDU_COUNT_AND_BYTES_WITHOUT_POLL_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MIXED_OPERATION_MODE_NPRACH_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MIXED_OPERATION_MODE_PAGING_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MOBILITY_SWITCH_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MULTITONE_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MULTI_CARRIER_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MULTI_CARRIER_NPRACH_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MULTI_CARRIER_PAGING_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_MULTI_NS_PMAX_ENABLED_kv;

typedef struct { 

    osal_u8 body;

} NB_IOT_UE_KEYID_NCELL_SIB_ATTEMPT_COUNTER_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_NPBCH_RRM_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_NPRACH_FORMAT_2_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_NSSS_RRM_ENABLED_kv;

typedef struct { 

    nb_iot_ue_nvconfig_autostart_config_t body;

} NB_IOT_UE_KEYID_NVCONFIG_AUTOSTART_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_NVCONFIG_BIP_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_NVCONFIG_ENH_RA_PWR_CTRL_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_NVCONFIG_ENH_RA_PWR_CTRL_FORCE_kv;

typedef struct { 

    nb_iot_ue_nvconfig_plmn_search_config_t body;

} NB_IOT_UE_KEYID_NVCONFIG_PLMN_SEARCH_CONFIG_kv;

typedef struct { 

    band_map_power_class body;

} NB_IOT_UE_KEYID_NVCONFIG_POWER_CLASS_kv;

typedef struct { 

    nb_iot_ue_nvconfig_uplane_config_t body;

} NB_IOT_UE_KEYID_NVCONFIG_UPLANE_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_OTDOT_ENABLE_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_PS_DATA_OFF_SUPPORTED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_RAI_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_RLC_UM_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_RSRP_BASED_AB_ENABLED_kv;

typedef struct { 

    nb_iot_ue_kv_scheduling_request_config_t body;

} NB_IOT_UE_KEYID_SCHEDULING_REQUEST_CONFIG_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_SERVING_CELL_IDLE_MEAS_REPORTING_ENABLED_kv;

typedef struct { 

    osal_u8 body;

} NB_IOT_UE_KEYID_SIB_ATTEMPT_COUNTER_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_SUSPEND_UICC_SUPPORTED_kv;

typedef struct { 

    osal_u16 body;

} NB_IOT_UE_KEYID_SYNC_TIME_PERIOD_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_T3324_T3412_EXT_VALUE_REPORT_ENABLED_kv;

typedef struct { 

    osal_bool body;

} NB_IOT_UE_KEYID_TWO_HARQ_PROCESS_ENABLED_kv;

typedef struct { 

    nb_iot_ue_kv_supported_bands body;

} NB_IOT_UE_KEYID_UE_KEYS_SUPPORTED_BANDS_kv;

typedef struct { 

    nb_iot_ue_kv_wake_up_signal_config_t body;

} NB_IOT_UE_KEYID_WAKE_UP_SIGNAL_CONFIG_kv;

typedef struct { 

    osal_u8 body;

} UICC_KEYID_BEHAVIOUR_kv;

typedef struct { 

    soc_io_pin body;

} UICC_KEYID_DET_PIN_kv;

